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author | Clifford Wolf <clifford@clifford.at> | 2014-07-19 15:32:14 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-07-19 15:32:14 +0200 |
commit | 26f982ac0b69deb3cb9eda69e5cf687a69de4606 (patch) | |
tree | f2db23057b52adc3cb869a195cd2a1e86d23aa59 /tests/memories | |
parent | e441f07d895a673c0bf40dcdc76781b50834fe44 (diff) | |
download | yosys-26f982ac0b69deb3cb9eda69e5cf687a69de4606.tar.gz yosys-26f982ac0b69deb3cb9eda69e5cf687a69de4606.tar.bz2 yosys-26f982ac0b69deb3cb9eda69e5cf687a69de4606.zip |
Fixed bug in memory_share feedback-to-en code
Diffstat (limited to 'tests/memories')
-rw-r--r-- | tests/memories/no_implicit_en.v | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/tests/memories/no_implicit_en.v b/tests/memories/no_implicit_en.v new file mode 100644 index 000000000..0e96e4ae1 --- /dev/null +++ b/tests/memories/no_implicit_en.v @@ -0,0 +1,24 @@ +// expect-wr-ports 1 +// expect-rd-ports 2 + +module test(clk, rd_addr, rd_data, cp_addr, wr_addr, wr_en, wr_data); + +input clk; + +input [3:0] rd_addr; +output reg [31:0] rd_data; + +input [3:0] cp_addr, wr_addr, wr_en; +input [31:0] wr_data; + +reg [31:0] mem [0:15]; + +always @(posedge clk) begin + mem[wr_addr][ 7: 0] <= wr_en[0] ? wr_data[ 7: 0] : mem[cp_addr][ 7: 0]; + mem[wr_addr][15: 8] <= wr_en[1] ? wr_data[15: 8] : mem[cp_addr][15: 8]; + mem[wr_addr][23:16] <= wr_en[2] ? wr_data[23:16] : mem[cp_addr][23:16]; + mem[wr_addr][31:24] <= wr_en[3] ? wr_data[31:24] : mem[cp_addr][31:24]; + rd_data <= mem[rd_addr]; +end + +endmodule |