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| author | Clifford Wolf <clifford@clifford.at> | 2015-01-06 13:33:51 +0100 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2015-01-06 13:33:51 +0100 |
| commit | 9c7f47bbd5fc190578054a6d018760c2f2b62c03 (patch) | |
| tree | 2349200118a55b18778b04aa858e9a2e33397767 /tests/asicworld/code_verilog_tutorial_decoder.v | |
| parent | 462b22f44fae71767991bd4eb502d009149b3995 (diff) | |
| download | yosys-9c7f47bbd5fc190578054a6d018760c2f2b62c03.tar.gz yosys-9c7f47bbd5fc190578054a6d018760c2f2b62c03.tar.bz2 yosys-9c7f47bbd5fc190578054a6d018760c2f2b62c03.zip | |
Towards Xilinx bram support
Diffstat (limited to 'tests/asicworld/code_verilog_tutorial_decoder.v')
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