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| author | Clifford Wolf <clifford@clifford.at> | 2016-02-01 10:10:20 +0100 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2016-02-01 10:10:20 +0100 |
| commit | 01bcc5663fa7c65ddbb6c55abebcfc60af8d200b (patch) | |
| tree | 2d0dedddcfc0689840be6b021b5251cf53c29e4a /tests/asicworld/code_verilog_tutorial_comment.v | |
| parent | ea492abcf01ee588a9756f8ae1f632ff418cd30c (diff) | |
| download | yosys-01bcc5663fa7c65ddbb6c55abebcfc60af8d200b.tar.gz yosys-01bcc5663fa7c65ddbb6c55abebcfc60af8d200b.tar.bz2 yosys-01bcc5663fa7c65ddbb6c55abebcfc60af8d200b.zip | |
SigMap performance improvement
Diffstat (limited to 'tests/asicworld/code_verilog_tutorial_comment.v')
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