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author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-06-11 22:25:04 +0100 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-07-05 23:28:59 +0200 |
commit | 09ecb9b2cf3ab76841d30712bf70dafc6d47ef67 (patch) | |
tree | 11db41357b31c25744d10ef150ce2efda94bd42d /tests/arch | |
parent | af54b8bc6123f6e90a97268624b84ac270dc1879 (diff) | |
download | yosys-09ecb9b2cf3ab76841d30712bf70dafc6d47ef67.tar.gz yosys-09ecb9b2cf3ab76841d30712bf70dafc6d47ef67.tar.bz2 yosys-09ecb9b2cf3ab76841d30712bf70dafc6d47ef67.zip |
intel_alm: direct M10K instantiation
Diffstat (limited to 'tests/arch')
-rw-r--r-- | tests/arch/intel_alm/blockram.ys | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tests/arch/intel_alm/blockram.ys b/tests/arch/intel_alm/blockram.ys new file mode 100644 index 000000000..610ae1ffd --- /dev/null +++ b/tests/arch/intel_alm/blockram.ys @@ -0,0 +1,6 @@ +read_verilog ../common/blockram.v +chparam -set ADDRESS_WIDTH 10 -set DATA_WIDTH 10 sync_ram_sdp +synth_intel_alm -family cyclonev +cd sync_ram_sdp +select -assert-count 1 t:MISTRAL_M10K +select -assert-none t:MISTRAL_M10K %% t:* %D |