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authorEddie Hung <eddie@fpgeh.com>2020-03-05 08:08:32 -0800
committerEddie Hung <eddie@fpgeh.com>2020-03-05 08:08:32 -0800
commit3c2e910bb3845f2e1507bc1985aaae1d0eba7245 (patch)
treee39e92828ee63abab14fcac273846d582d5b7788 /tests/arch/run-test.sh
parent0930c00f038453685bf4d8f5366db7fe71f54cf8 (diff)
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tests: extend tests/arch/run-tests.sh for defines
Diffstat (limited to 'tests/arch/run-test.sh')
-rwxr-xr-xtests/arch/run-test.sh17
1 files changed, 14 insertions, 3 deletions
diff --git a/tests/arch/run-test.sh b/tests/arch/run-test.sh
index 5292d1615..170078a7f 100755
--- a/tests/arch/run-test.sh
+++ b/tests/arch/run-test.sh
@@ -2,12 +2,23 @@
set -e
+declare -A defines=( ["ice40"]="ICE40_HX ICE40_LP ICE40_U" )
+
echo "Running syntax check on arch sim models"
for arch in ../../techlibs/*; do
find $arch -name cells_sim.v | while read path; do
- echo -n "Test $path ->"
- iverilog -t null -I$arch $path
- echo " ok"
+ arch_name=$(basename -- $arch)
+ if [ "${defines[$arch_name]}" ]; then
+ for def in ${defines[$arch_name]}; do
+ echo -n "Test $path -D$def ->"
+ iverilog -t null -I$arch -D$def $path
+ echo " ok"
+ done
+ else
+ echo -n "Test $path ->"
+ iverilog -t null -I$arch $path
+ echo " ok"
+ fi
done
done