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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-06-11 18:06:39 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-11 19:55:51 +0200 |
| commit | 8b4eb78849d2236ddde1ad02c7f794689c22a347 (patch) | |
| tree | 9792053c34100ebb875ec317cf54f00319418ac2 /tests/arch/intel_alm | |
| parent | 8a4841d78690313a91af97e8c6d9aa3e65a3e491 (diff) | |
| download | yosys-8b4eb78849d2236ddde1ad02c7f794689c22a347.tar.gz yosys-8b4eb78849d2236ddde1ad02c7f794689c22a347.tar.bz2 yosys-8b4eb78849d2236ddde1ad02c7f794689c22a347.zip | |
intel_alm: fix DFFE matching
Diffstat (limited to 'tests/arch/intel_alm')
| -rw-r--r-- | tests/arch/intel_alm/dffs.ys | 3 | ||||
| -rw-r--r-- | tests/arch/intel_alm/fsm.ys | 5 |
2 files changed, 4 insertions, 4 deletions
diff --git a/tests/arch/intel_alm/dffs.ys b/tests/arch/intel_alm/dffs.ys index cf29ad8e0..149b3121a 100644 --- a/tests/arch/intel_alm/dffs.ys +++ b/tests/arch/intel_alm/dffs.ys @@ -17,6 +17,5 @@ equiv_opt -async2sync -assert -map +/intel_alm/common/alm_sim.v -map +/intel_alm design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd dffe # Constrain all select calls below inside the top module select -assert-count 1 t:MISTRAL_FF -select -assert-count 1 t:MISTRAL_ALUT3 -select -assert-none t:MISTRAL_FF t:MISTRAL_ALUT3 %% t:* %D +select -assert-none t:MISTRAL_FF %% t:* %D diff --git a/tests/arch/intel_alm/fsm.ys b/tests/arch/intel_alm/fsm.ys index 8bb0ebab2..67965569b 100644 --- a/tests/arch/intel_alm/fsm.ys +++ b/tests/arch/intel_alm/fsm.ys @@ -13,6 +13,7 @@ cd fsm # Constrain all select calls below inside the top module select -assert-count 6 t:MISTRAL_FF select -assert-max 2 t:MISTRAL_ALUT2 # Clang returns 2, GCC returns 1 +select -assert-count 1 t:MISTRAL_ALUT3 select -assert-count 5 t:MISTRAL_ALUT5 -select -assert-count 1 t:MISTRAL_ALUT6 -select -assert-none t:MISTRAL_FF t:MISTRAL_ALUT2 t:MISTRAL_ALUT5 t:MISTRAL_ALUT6 %% t:* %D +select -assert-count 2 t:MISTRAL_ALUT6 +select -assert-none t:MISTRAL_FF t:MISTRAL_ALUT2 t:MISTRAL_ALUT3 t:MISTRAL_ALUT5 t:MISTRAL_ALUT6 %% t:* %D |