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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-05 07:01:02 -0800 | 
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-05 07:01:02 -0800 | 
| commit | d8fbf88980d6ccd22e2aa3f34c4ff2a39aeed9df (patch) | |
| tree | bb599fdda7619941619379536838bf10be5f89f7 /tests/arch/ice40 | |
| parent | 67f1ce2d4340c359137ac00e4ca085e6711986f3 (diff) | |
| download | yosys-d8fbf88980d6ccd22e2aa3f34c4ff2a39aeed9df.tar.gz yosys-d8fbf88980d6ccd22e2aa3f34c4ff2a39aeed9df.tar.bz2 yosys-d8fbf88980d6ccd22e2aa3f34c4ff2a39aeed9df.zip | |
Add WIP test for unwrapping $__ICE40_CARRY_WRAPPER
Diffstat (limited to 'tests/arch/ice40')
| -rw-r--r-- | tests/arch/ice40/wrapcarry.ys | 30 | 
1 files changed, 30 insertions, 0 deletions
| diff --git a/tests/arch/ice40/wrapcarry.ys b/tests/arch/ice40/wrapcarry.ys index 10c029e68..a4b0d357a 100644 --- a/tests/arch/ice40/wrapcarry.ys +++ b/tests/arch/ice40/wrapcarry.ys @@ -20,3 +20,33 @@ EOT  ice40_wrapcarry  select -assert-count 1 t:$__ICE40_CARRY_WRAPPER + +design -reset +read_verilog <<EOT +module top(input A, B, CI, output O, CO); +    (* foo = "bar", answer = 42 *) +	SB_CARRY carry ( +		.I0(A), +		.I1(B), +		.CI(CI), +		.CO(CO) +	); +    (* keep, blah="blah", answer = 43 *) +	SB_LUT4 #( +		.LUT_INIT(16'b 0110_1001_1001_0110) +	) adder ( +		.I0(1'b0), +		.I1(A), +		.I2(B), +		.I3(1'b0), +		.O(O) +	); +endmodule +EOT + +ice40_wrapcarry +select -assert-count 1 t:$__ICE40_CARRY_WRAPPER +select -assert-count 0 t:* t:$__ICE40_CARRY_WRAPPER %d +select -assert-count 1 a:foo=bar a:answer=42 %i a:keep %i a:blah=blah %i +techmap -map +/ice40/cells_map.v +#TODO: Check unwrapped attributes | 
