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author | N. Engelhardt <nak@symbioticeda.com> | 2020-01-03 12:28:48 +0100 |
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committer | N. Engelhardt <nak@symbioticeda.com> | 2020-01-03 12:28:48 +0100 |
commit | 341fd872b59e8f95aa14afd9f17225d2c03a4283 (patch) | |
tree | 21802e73ca767d124971d43d3f78d9f4cf7d62e2 /tests/arch/ice40/lutram.ys | |
parent | c8bc1793a4e8230c29fca4a34862414e8ab8722b (diff) | |
parent | f8d5920a7e61f78873b7bf49dd7e8f3a83f7adf3 (diff) | |
download | yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.tar.gz yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.tar.bz2 yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.zip |
Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad_script
Diffstat (limited to 'tests/arch/ice40/lutram.ys')
-rw-r--r-- | tests/arch/ice40/lutram.ys | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/tests/arch/ice40/lutram.ys b/tests/arch/ice40/lutram.ys new file mode 100644 index 000000000..1ba40f8ec --- /dev/null +++ b/tests/arch/ice40/lutram.ys @@ -0,0 +1,15 @@ +read_verilog ../common/lutram.v +hierarchy -top lutram_1w1r +proc +memory -nomap +equiv_opt -run :prove -map +/ice40/cells_sim.v synth_ice40 +memory +opt -full + +miter -equiv -flatten -make_assert -make_outputs gold gate miter +sat -verify -prove-asserts -seq 5 -set-init-zero -show-inputs -show-outputs miter + +design -load postopt +cd lutram_1w1r +select -assert-count 1 t:SB_RAM40_4K +select -assert-none t:SB_RAM40_4K %% t:* %D |