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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-02-03 14:57:17 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-03 14:57:17 +0100 |
| commit | 34d2fbd2f96a8789aa7eb655318308e11949eb7a (patch) | |
| tree | 246fac88cc076f041cb9194bf6e4f954d50fd78c /tests/arch/gowin | |
| parent | 7033503cd9e40e16c11fe6c805a436b0e23989dd (diff) | |
| download | yosys-34d2fbd2f96a8789aa7eb655318308e11949eb7a.tar.gz yosys-34d2fbd2f96a8789aa7eb655318308e11949eb7a.tar.bz2 yosys-34d2fbd2f96a8789aa7eb655318308e11949eb7a.zip | |
Add opt_lut_ins pass. (#1673)
Diffstat (limited to 'tests/arch/gowin')
| -rw-r--r-- | tests/arch/gowin/mux.ys | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/arch/gowin/mux.ys b/tests/arch/gowin/mux.ys index afad29a89..33b092284 100644 --- a/tests/arch/gowin/mux.ys +++ b/tests/arch/gowin/mux.ys @@ -18,13 +18,13 @@ proc equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd mux4 # Constrain all select calls below inside the top module -select -assert-count 4 t:LUT4 +select -assert-count 4 t:LUT* select -assert-count 2 t:MUX2_LUT5 select -assert-count 1 t:MUX2_LUT6 select -assert-count 6 t:IBUF select -assert-count 1 t:OBUF -select -assert-none t:LUT4 t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D +select -assert-none t:LUT* t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D design -load read hierarchy -top mux8 @@ -35,7 +35,7 @@ cd mux8 # Constrain all select calls below inside the top module select -assert-count 11 t:IBUF select -assert-count 1 t:OBUF -select -assert-none t:LUT4 t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D +select -assert-none t:LUT* t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D design -load read hierarchy -top mux16 @@ -46,4 +46,4 @@ cd mux16 # Constrain all select calls below inside the top module select -assert-count 20 t:IBUF select -assert-count 1 t:OBUF -select -assert-none t:LUT4 t:MUX2_LUT6 t:MUX2_LUT5 t:MUX2_LUT6 t:MUX2_LUT7 t:MUX2_LUT8 t:IBUF t:OBUF %% t:* %D +select -assert-none t:GND t:VCC t:LUT* t:MUX2_LUT6 t:MUX2_LUT5 t:MUX2_LUT6 t:MUX2_LUT7 t:MUX2_LUT8 t:IBUF t:OBUF %% t:* %D |