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author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-10-21 16:25:15 +0200 |
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committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-10-21 16:25:15 +0200 |
commit | 83fbfe0964dc7315ca6d508e6069507250d9f093 (patch) | |
tree | c64a7a245bf239abbbab15fb63fb7225dadad931 /tests/arch/gowin/dffs.ys | |
parent | 03457ee13e36574add688a9c2c5c0641a4d6df05 (diff) | |
download | yosys-83fbfe0964dc7315ca6d508e6069507250d9f093.tar.gz yosys-83fbfe0964dc7315ca6d508e6069507250d9f093.tar.bz2 yosys-83fbfe0964dc7315ca6d508e6069507250d9f093.zip |
Add some tests
Copied from Efinix.
* fsm is broken
* latch and tribuf are not implemented yet
* memory maps to dram
Diffstat (limited to 'tests/arch/gowin/dffs.ys')
-rw-r--r-- | tests/arch/gowin/dffs.ys | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/tests/arch/gowin/dffs.ys b/tests/arch/gowin/dffs.ys new file mode 100644 index 000000000..9c012213f --- /dev/null +++ b/tests/arch/gowin/dffs.ys @@ -0,0 +1,25 @@ +read_verilog ../common/dffs.v +design -save read + +hierarchy -top dff +proc +equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd dff # Constrain all select calls below inside the top module +select -assert-count 1 t:DFF +select -assert-count 2 t:IBUF +select -assert-count 1 t:OBUF + +select -assert-none t:DFF t:IBUF t:OBUF %% t:* %D + +design -load read +hierarchy -top dffe +proc +equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd dffe # Constrain all select calls below inside the top module +select -assert-count 1 t:DFFE +select -assert-count 3 t:IBUF +select -assert-count 1 t:OBUF + +select -assert-none t:DFFE t:IBUF t:OBUF %% t:* %D |