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| author | Patrick Urban <patrick.urban@web.de> | 2021-10-18 10:46:18 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-11-13 21:53:25 +0100 |
| commit | 97d03c2b3b3c5bee9685786f17d1d14ab77c6f6e (patch) | |
| tree | bab2cd5a941764db18ea228c639dfd955772cca9 /tests/arch/gatemate/add_sub.ys | |
| parent | 76bf96d310659864c47838aa5e0f43cdfe2bc3e6 (diff) | |
| download | yosys-97d03c2b3b3c5bee9685786f17d1d14ab77c6f6e.tar.gz yosys-97d03c2b3b3c5bee9685786f17d1d14ab77c6f6e.tar.bz2 yosys-97d03c2b3b3c5bee9685786f17d1d14ab77c6f6e.zip | |
synth_gatemate: Apply new test practice with assert-max
Diffstat (limited to 'tests/arch/gatemate/add_sub.ys')
| -rw-r--r-- | tests/arch/gatemate/add_sub.ys | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/arch/gatemate/add_sub.ys b/tests/arch/gatemate/add_sub.ys index c0055e521..bf261ba5a 100644 --- a/tests/arch/gatemate/add_sub.ys +++ b/tests/arch/gatemate/add_sub.ys @@ -5,5 +5,5 @@ equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivale design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module select -assert-count 8 t:CC_ADDF -select -assert-count 4 t:CC_LUT1 +select -assert-max 4 t:CC_LUT1 select -assert-none t:CC_ADDF t:CC_LUT1 %% t:* %D |