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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-01 14:17:01 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-01 14:17:01 -0700 |
| commit | 4ae7f3a8edded54c33a92b02659167c8a6af2522 (patch) | |
| tree | 11da11fa2a7d05f7e45dfd6b3f011d5120edb846 /tests/arch/anlogic/fsm.ys | |
| parent | e79bc45975321b806b23c47a41f2eb26c16f342e (diff) | |
| parent | 0c0dc4ffc3c907fbe6973c925e9de07c2286cd6a (diff) | |
| download | yosys-4ae7f3a8edded54c33a92b02659167c8a6af2522.tar.gz yosys-4ae7f3a8edded54c33a92b02659167c8a6af2522.tar.bz2 yosys-4ae7f3a8edded54c33a92b02659167c8a6af2522.zip | |
Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor
opt_expr: optimise $xor/$xnor/$_XOR_/$_XNOR_ -s with constant inputs
Diffstat (limited to 'tests/arch/anlogic/fsm.ys')
| -rw-r--r-- | tests/arch/anlogic/fsm.ys | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/tests/arch/anlogic/fsm.ys b/tests/arch/anlogic/fsm.ys index 0bcc4e011..eb94177ad 100644 --- a/tests/arch/anlogic/fsm.ys +++ b/tests/arch/anlogic/fsm.ys @@ -10,9 +10,6 @@ sat -verify -prove-asserts -show-public -set-at 1 in_reset 1 -seq 20 -prove-skip design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd fsm # Constrain all select calls below inside the top module -select -assert-count 1 t:AL_MAP_LUT2 -select -assert-count 5 t:AL_MAP_LUT5 -select -assert-count 1 t:AL_MAP_LUT6 select -assert-count 6 t:AL_MAP_SEQ -select -assert-none t:AL_MAP_LUT2 t:AL_MAP_LUT5 t:AL_MAP_LUT6 t:AL_MAP_SEQ %% t:* %D +select -assert-none t:AL_MAP_LUT* t:AL_MAP_SEQ %% t:* %D |