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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-10 10:27:55 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-10 10:27:55 -0700 |
| commit | a91ea6612a73568782c80bd12ce2875353e2b5c5 (patch) | |
| tree | ff0978c5a0bd84f428a270dab7ba3a19b7a9f660 /tests/aiger | |
| parent | 498c21e7350d88bf8d14c73f5b07e3b6a1f6b5ca (diff) | |
| download | yosys-a91ea6612a73568782c80bd12ce2875353e2b5c5.tar.gz yosys-a91ea6612a73568782c80bd12ce2875353e2b5c5.tar.bz2 yosys-a91ea6612a73568782c80bd12ce2875353e2b5c5.zip | |
Add some more comments
Diffstat (limited to 'tests/aiger')
| -rwxr-xr-x | tests/aiger/run-test.sh | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/tests/aiger/run-test.sh b/tests/aiger/run-test.sh index e56d0fa80..f52eb4ac1 100755 --- a/tests/aiger/run-test.sh +++ b/tests/aiger/run-test.sh @@ -2,9 +2,14 @@ set -e +# NB: *.aag and *.aig must contain a symbol table naming the primary +# inputs and outputs, otherwise ABC and Yosys will name them +# arbitrarily (and inconsistently with each other). + for aag in *.aag; do # Since ABC cannot read *.aag, read the *.aig instead - # (which would have been created by the reference aig2aig utility) + # (which would have been created by the reference aig2aig utility, + # available from http://fmv.jku.at/aiger/) ../../yosys-abc -c "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v" ../../yosys -p " read_verilog ${aag%.*}_ref.v |