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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-10 13:17:47 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-10 13:17:47 -0700 |
| commit | bfda921d0317bfb4cb6fc9de8a556c2258b709bc (patch) | |
| tree | 4e94d742d5f3da835937049496aed91320789794 /techlibs/xilinx | |
| parent | cba63fe72b27c135e5fe04560d3a625e82c65fe3 (diff) | |
| download | yosys-bfda921d0317bfb4cb6fc9de8a556c2258b709bc.tar.gz yosys-bfda921d0317bfb4cb6fc9de8a556c2258b709bc.tar.bz2 yosys-bfda921d0317bfb4cb6fc9de8a556c2258b709bc.zip | |
Remove "opt_expr -fine" call
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 95b2c4040..e13491e2c 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -325,7 +325,6 @@ struct SynthXilinxPass : public ScriptPass if (!nodsp || help_mode) { // NB: Xilinx multipliers are signed only run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18", "(skip if '-nodsp')"); - run("opt_expr -fine", " (skip if '-nodsp')"); run("wreduce", " (skip if '-nodsp')"); run("xilinx_dsp", " (skip if '-nodsp')"); run("chtype -set $mul t:$__soft_mul"," (skip if '-nodsp')"); |