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author | Eddie Hung <eddie@fpgeh.com> | 2019-09-27 14:32:07 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-27 14:32:07 -0700 |
commit | b3d8a60cbd94176076f23c4ea6c94ec24e6773e0 (patch) | |
tree | 31c703711f905d1e5ddd40aa6800cc940a7fccbb /techlibs/xilinx | |
parent | 90236025b7e1409027550451abe4ffc1cc63f128 (diff) | |
download | yosys-b3d8a60cbd94176076f23c4ea6c94ec24e6773e0.tar.gz yosys-b3d8a60cbd94176076f23c4ea6c94ec24e6773e0.tar.bz2 yosys-b3d8a60cbd94176076f23c4ea6c94ec24e6773e0.zip |
Re-order
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index d73cc3b16..6c58e0913 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -347,9 +347,9 @@ struct SynthXilinxPass : public ScriptPass "-D DSP_Y_MINWIDTH=9 " // UG901 suggests small multiplies are those 4x4 and smaller "-D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18"); run("select a:mul2dsp"); + run("setattr -unset mul2dsp"); run("opt_expr -fine"); run("wreduce"); - run("setattr -unset mul2dsp"); run("select -clear"); run("xilinx_dsp"); run("chtype -set $mul t:$__soft_mul"); |