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| author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-12-14 14:14:45 +0800 |
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| committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-12-14 14:14:45 +0800 |
| commit | 262f8f913cd7b72fa86b0465590c8f6ad9e2d036 (patch) | |
| tree | 412d63240528a0794b79cadaf9e7f22376cb7fd8 /techlibs/xilinx | |
| parent | c77e6e6114f4489ce4801c9593e0eea42e485ae5 (diff) | |
| download | yosys-262f8f913cd7b72fa86b0465590c8f6ad9e2d036.tar.gz yosys-262f8f913cd7b72fa86b0465590c8f6ad9e2d036.tar.bz2 yosys-262f8f913cd7b72fa86b0465590c8f6ad9e2d036.zip | |
greenpak4: Cleaned up trailing spaces in cells_sim
Diffstat (limited to 'techlibs/xilinx')
0 files changed, 0 insertions, 0 deletions