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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-26 10:34:14 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-26 10:34:14 -0700 |
| commit | 033aefc0f44abdca50e34cad884c81875dcd7441 (patch) | |
| tree | 292ff904e1a78ff8fcf2792d42a6066dfaed1319 /techlibs/xilinx | |
| parent | bd8661e0247121cf411b4c35fcedbc12a5919b50 (diff) | |
| download | yosys-033aefc0f44abdca50e34cad884c81875dcd7441.tar.gz yosys-033aefc0f44abdca50e34cad884c81875dcd7441.tar.bz2 yosys-033aefc0f44abdca50e34cad884c81875dcd7441.zip | |
Typo
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 0445eb720..d73cc3b16 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -347,7 +347,7 @@ struct SynthXilinxPass : public ScriptPass "-D DSP_Y_MINWIDTH=9 " // UG901 suggests small multiplies are those 4x4 and smaller "-D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18"); run("select a:mul2dsp"); - run("opt_expr -fine"): + run("opt_expr -fine"); run("wreduce"); run("setattr -unset mul2dsp"); run("select -clear"); |