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authorDiego H <diego@symbioticeda.com>2019-12-13 15:43:24 -0600
committerDiego H <diego@symbioticeda.com>2019-12-13 15:43:24 -0600
commit266993408a2b926ffefcf536feb92b36b11e398e (patch)
tree1618b4ed1ed4237015b5b14ea4f0f7843e67d50f /techlibs/xilinx/xc7_xcu_brams.txt
parent52875b0d61b2b1cc83a9e9d51964a92027c3758c (diff)
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Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific
Diffstat (limited to 'techlibs/xilinx/xc7_xcu_brams.txt')
-rw-r--r--techlibs/xilinx/xc7_xcu_brams.txt19
1 files changed, 19 insertions, 0 deletions
diff --git a/techlibs/xilinx/xc7_xcu_brams.txt b/techlibs/xilinx/xc7_xcu_brams.txt
index b7c893ff7..a52dd9352 100644
--- a/techlibs/xilinx/xc7_xcu_brams.txt
+++ b/techlibs/xilinx/xc7_xcu_brams.txt
@@ -81,6 +81,7 @@ match $__XILINX_RAMB36_SDP
min efficiency 5
shuffle_enable B
make_transp
+ attribute !ram_style !logic_block
or_next_if_better
endmatch
@@ -89,6 +90,14 @@ match $__XILINX_RAMB18_SDP
min efficiency 5
shuffle_enable B
make_transp
+ attribute !ram_style !logic_block
+ or_next_if_better
+endmatch
+
+match $__XILINX_RAMB18_SDP
+ shuffle_enable B
+ make_transp
+ attribute ram_block=1 ram_style=block
or_next_if_better
endmatch
@@ -97,6 +106,7 @@ match $__XILINX_RAMB36_TDP
min efficiency 5
shuffle_enable B
make_transp
+ attribute !ram_style !logic_block
or_next_if_better
endmatch
@@ -105,4 +115,13 @@ match $__XILINX_RAMB18_TDP
min efficiency 5
shuffle_enable B
make_transp
+ attribute !ram_style !logic_block
+ or_next_if_better
+endmatch
+
+match $__XILINX_RAMB18_TDP
+ min efficiency 5
+ shuffle_enable B
+ make_transp
+ attribute ram_block=1 ram_style=block
endmatch