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| author | Miodrag Milanovic <mmicko@gmail.com> | 2019-12-28 16:23:31 +0100 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-12-28 16:23:31 +0100 |
| commit | 8c3de1d4bd8a08756dee569430c03229e9e89a95 (patch) | |
| tree | 5b899b27cf3f25d7708960004b7d7657fedcd253 /techlibs/xilinx/xc3sda_dsp_map.v | |
| parent | a82c701668d8197c01e54cb68bc45f2278f3172f (diff) | |
| parent | 9e6632c40ac24d8839bb76ca2f9674edfdc750f9 (diff) | |
| download | yosys-8c3de1d4bd8a08756dee569430c03229e9e89a95.tar.gz yosys-8c3de1d4bd8a08756dee569430c03229e9e89a95.tar.bz2 yosys-8c3de1d4bd8a08756dee569430c03229e9e89a95.zip | |
Merge remote-tracking branch 'origin/master' into iopad_default
Diffstat (limited to 'techlibs/xilinx/xc3sda_dsp_map.v')
| -rw-r--r-- | techlibs/xilinx/xc3sda_dsp_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/xc3sda_dsp_map.v b/techlibs/xilinx/xc3sda_dsp_map.v index 87348a173..258f90395 100644 --- a/techlibs/xilinx/xc3sda_dsp_map.v +++ b/techlibs/xilinx/xc3sda_dsp_map.v @@ -27,7 +27,7 @@ module \$__MUL18X18 (input [17:0] A, input [17:0] B, output [35:0] Y); .D(18'b0), .P(P_48), - .OPMODE(8'b0000010) + .OPMODE(8'b0000001) ); assign Y = P_48; endmodule |