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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2022-02-09 09:25:45 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2022-05-18 17:32:56 +0200 |
| commit | e4d811561cfb8e7acdbd70dd500600427e3a1756 (patch) | |
| tree | bbd545b1374c14f9af255643496f669a33d7aadd /techlibs/xilinx/synth_xilinx.cc | |
| parent | 0a8eaca322a622610efe5a0d33d1cda83e4afa8c (diff) | |
| download | yosys-e4d811561cfb8e7acdbd70dd500600427e3a1756.tar.gz yosys-e4d811561cfb8e7acdbd70dd500600427e3a1756.tar.bz2 yosys-e4d811561cfb8e7acdbd70dd500600427e3a1756.zip | |
gowin: Use `memory_libmap` pass.
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
0 files changed, 0 insertions, 0 deletions