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| author | Ahmed Irfan <irfan@levert.(none)> | 2015-04-03 16:38:07 +0200 |
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| committer | Ahmed Irfan <irfan@levert.(none)> | 2015-04-03 16:38:07 +0200 |
| commit | bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee (patch) | |
| tree | 1d02541701054a1c3b1cdb66478d0cbc31c2d38f /techlibs/xilinx/example_zed_counter/README | |
| parent | 8acdd90bc918b780ad45cdac42b3baf84d2cc476 (diff) | |
| parent | 4b4490761949e738dee54bdfc52e080e0a5c9067 (diff) | |
| download | yosys-bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee.tar.gz yosys-bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee.tar.bz2 yosys-bdf6b2b19ab2206f5957ad5b2ec582c2730d45ee.zip | |
Merge branch 'master' of https://github.com/cliffordwolf/yosys
Diffstat (limited to 'techlibs/xilinx/example_zed_counter/README')
| -rw-r--r-- | techlibs/xilinx/example_zed_counter/README | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/techlibs/xilinx/example_zed_counter/README b/techlibs/xilinx/example_zed_counter/README deleted file mode 100644 index 539f24e73..000000000 --- a/techlibs/xilinx/example_zed_counter/README +++ /dev/null @@ -1,10 +0,0 @@ - -This is a simple example for Yosys synthesis targeting the ZED FPGA -development board [1, 2]. Simple script for xst-based synthesis (incl. -generation of reference edif files) and uploading to the board can be -found here [3]. - -[1] http://www.zedboard.org/ -[2] https://www.xilinx.com/zynq/ -[3] http://verilog.james.walms.co.uk/ - |