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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-16 15:54:27 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-16 15:54:27 -0700 |
| commit | c501aa5ee84c14f5b6aebe3052dabb1c314eb9e0 (patch) | |
| tree | e7237aebcaa7075345eb49a6d4162f7f27039a58 /techlibs/xilinx/dsp_map.v | |
| parent | 3f677fb0db15f75d9655fe653f991c94e78a4a1f (diff) | |
| download | yosys-c501aa5ee84c14f5b6aebe3052dabb1c314eb9e0.tar.gz yosys-c501aa5ee84c14f5b6aebe3052dabb1c314eb9e0.tar.bz2 yosys-c501aa5ee84c14f5b6aebe3052dabb1c314eb9e0.zip | |
Signedness
Diffstat (limited to 'techlibs/xilinx/dsp_map.v')
| -rw-r--r-- | techlibs/xilinx/dsp_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/dsp_map.v b/techlibs/xilinx/dsp_map.v index da1d6f3a9..28e456898 100644 --- a/techlibs/xilinx/dsp_map.v +++ b/techlibs/xilinx/dsp_map.v @@ -20,7 +20,7 @@ module \$__MUL25X18 (input [24:0] A, input [17:0] B, output [42:0] Y); .PREG(0) ) _TECHMAP_REPLACE_ ( //Data path - .A({5'b0, A}), + .A({{5{A[24]}}, A}), .B(B), .C(48'b0), .D(24'b0), |