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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2018-11-10 12:37:45 -0800 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2018-11-10 12:45:07 -0800 |
| commit | 99a14b0e37a383de39136807f9eb09e18fa859b9 (patch) | |
| tree | df450be5e8193d18b23e0cd59fca6fe0fa132580 /techlibs/xilinx/cells_xtra.sh | |
| parent | 5387ccb041f4acafc96c7b3fcf8db04dddfb8ab5 (diff) | |
| download | yosys-99a14b0e37a383de39136807f9eb09e18fa859b9.tar.gz yosys-99a14b0e37a383de39136807f9eb09e18fa859b9.tar.bz2 yosys-99a14b0e37a383de39136807f9eb09e18fa859b9.zip | |
Add support for Xilinx PS7 block
Diffstat (limited to 'techlibs/xilinx/cells_xtra.sh')
| -rw-r--r-- | techlibs/xilinx/cells_xtra.sh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_xtra.sh b/techlibs/xilinx/cells_xtra.sh index e7c7d17bf..0480410f5 100644 --- a/techlibs/xilinx/cells_xtra.sh +++ b/techlibs/xilinx/cells_xtra.sh @@ -112,6 +112,7 @@ function xtract_cell_decl() xtract_cell_decl PHY_CONTROL xtract_cell_decl PLLE2_ADV xtract_cell_decl PLLE2_BASE + xtract_cell_decl PS7 xtract_cell_decl PULLDOWN xtract_cell_decl PULLUP # xtract_cell_decl RAM128X1D |