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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-26 11:38:28 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-26 11:38:28 -0700 |
| commit | 8d8261c71fd34de7eb4cb5ae7bdb2592f33ed852 (patch) | |
| tree | e6d0d580a8fbfe22c17b91fbc311e5e793b9653c /techlibs/xilinx/cells_sim.v | |
| parent | 80de03a7a64351bdc617cc14e609b858a1f93954 (diff) | |
| download | yosys-8d8261c71fd34de7eb4cb5ae7bdb2592f33ed852.tar.gz yosys-8d8261c71fd34de7eb4cb5ae7bdb2592f33ed852.tar.bz2 yosys-8d8261c71fd34de7eb4cb5ae7bdb2592f33ed852.zip | |
Do not call opt with -full before muxcover
Diffstat (limited to 'techlibs/xilinx/cells_sim.v')
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