aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/xilinx/cells_sim.v
diff options
context:
space:
mode:
authorKeith Rothman <537074+litghost@users.noreply.github.com>2019-08-19 08:42:09 -0700
committerMarcelina Koƛcielnicka <mwk@0x04.net>2020-07-23 00:56:09 +0200
commit819f1d8c20e07da66122292b90603867b78ff2d2 (patch)
tree652b8c8699eeee65ecfafbe9fb2087f3961d8596 /techlibs/xilinx/cells_sim.v
parent57af8499dfc3c35d7327107ad30c1124c646fefd (diff)
downloadyosys-819f1d8c20e07da66122292b90603867b78ff2d2.tar.gz
yosys-819f1d8c20e07da66122292b90603867b78ff2d2.tar.bz2
yosys-819f1d8c20e07da66122292b90603867b78ff2d2.zip
Remove EXPLICIT_CARRY logic.
The symbiflow-arch-defs tool chain no longer needs the EXPLICIT_CARRY within yosys itself. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Diffstat (limited to 'techlibs/xilinx/cells_sim.v')
-rw-r--r--techlibs/xilinx/cells_sim.v23
1 files changed, 0 insertions, 23 deletions
diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v
index f5850d8a2..a04587e87 100644
--- a/techlibs/xilinx/cells_sim.v
+++ b/techlibs/xilinx/cells_sim.v
@@ -455,29 +455,6 @@ module CARRY8(
assign CO[7] = S[7] ? CO[6] : DI[7];
endmodule
-`ifdef _EXPLICIT_CARRY
-
-module CARRY0(output CO_CHAIN, CO_FABRIC, O, input CI, CI_INIT, DI, S);
- parameter CYINIT_FABRIC = 0;
- wire CI_COMBINE;
- if(CYINIT_FABRIC) begin
- assign CI_COMBINE = CI_INIT;
- end else begin
- assign CI_COMBINE = CI;
- end
- assign CO_CHAIN = S ? CI_COMBINE : DI;
- assign CO_FABRIC = S ? CI_COMBINE : DI;
- assign O = S ^ CI_COMBINE;
-endmodule
-
-module CARRY(output CO_CHAIN, CO_FABRIC, O, input CI, DI, S);
- assign CO_CHAIN = S ? CI : DI;
- assign CO_FABRIC = S ? CI : DI;
- assign O = S ^ CI;
-endmodule
-
-`endif
-
module ORCY (output O, input CI, I);
assign O = CI | I;
endmodule