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| author | Eddie Hung <eddie@fpgeh.com> | 2020-03-04 11:28:14 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-03-04 11:31:12 -0800 |
| commit | 512596760b947a9ac9088856490970d0930dd951 (patch) | |
| tree | fcb8e522a04181f0bfa04e27d64de75626c01a64 /techlibs/xilinx/cells_sim.v | |
| parent | f65fc845e53e12d01077604aa077c93fa3cac7f2 (diff) | |
| download | yosys-512596760b947a9ac9088856490970d0930dd951.tar.gz yosys-512596760b947a9ac9088856490970d0930dd951.tar.bz2 yosys-512596760b947a9ac9088856490970d0930dd951.zip | |
xilinx: cleanup DSP48E1 handling for abc9
Diffstat (limited to 'techlibs/xilinx/cells_sim.v')
0 files changed, 0 insertions, 0 deletions