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| author | Eddie Hung <eddie@fpgeh.com> | 2019-05-03 15:05:57 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-03 15:05:57 -0700 |
| commit | d9c4644e88b916d1eadfd401abf297c0995b6462 (patch) | |
| tree | c6355f3671d0399814f5e9257e7f5decdf906b7f /techlibs/xilinx/cells_map.v | |
| parent | 67005633e246e47683b11e13f08afb788bc9de02 (diff) | |
| parent | c2e29ab809c5eb3ac89d50868d0e88d831c33d52 (diff) | |
| download | yosys-d9c4644e88b916d1eadfd401abf297c0995b6462.tar.gz yosys-d9c4644e88b916d1eadfd401abf297c0995b6462.tar.bz2 yosys-d9c4644e88b916d1eadfd401abf297c0995b6462.zip | |
Merge remote-tracking branch 'origin/master' into clifford/specify
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
| -rw-r--r-- | techlibs/xilinx/cells_map.v | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index 704ab21b1..40789ddbe 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -17,6 +17,16 @@ * */ +// Convert negative-polarity reset to positive-polarity +(* techmap_celltype = "$_DFF_NN0_" *) +module _90_dff_nn0_to_np0 (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_PN0_" *) +module _90_dff_pn0_to_pp0 (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_NN1_" *) +module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_PN1_" *) +module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule + module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; parameter [DEPTH-1:0] INIT = 0; |