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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 14:50:00 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 14:50:00 -0700 |
| commit | 26cb3e7afc603b5aa703434c2cdfad444a4d4db0 (patch) | |
| tree | cb346623885c4bc1e98affc623084f58b0a87ce2 /techlibs/xilinx/cells_map.v | |
| parent | 09beeee38a5af767f70d24e86c976e43b1b27547 (diff) | |
| parent | 8110fb9266e685aaea48359a5aebc4e5ac865240 (diff) | |
| download | yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.tar.gz yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.tar.bz2 yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.zip | |
Merge remote-tracking branch 'origin/master' into eddie/wreduce_add
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
| -rw-r--r-- | techlibs/xilinx/cells_map.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index 2eb9fa2c1..b8e5bafc7 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -24,9 +24,9 @@ module _90_dff_nn0_to_np0 (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLA (* techmap_celltype = "$_DFF_PN0_" *) module _90_dff_pn0_to_pp0 (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule (* techmap_celltype = "$_DFF_NN1_" *) -module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule (* techmap_celltype = "$_DFF_PN1_" *) -module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; |