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| author | R. Ou <rqou@robertou.com> | 2020-03-02 00:32:36 -0800 |
|---|---|---|
| committer | R. Ou <rqou@robertou.com> | 2020-03-02 00:32:57 -0800 |
| commit | a6180048970802a4b8726a2a8d6abcbb4aebc942 (patch) | |
| tree | 0666d1468466e3afaf5ef9b758f60ed65cc2ee34 /techlibs/xilinx/Makefile.inc | |
| parent | a6aeee4e1a41aa71d08ebac48686001ec050f973 (diff) | |
| download | yosys-a6180048970802a4b8726a2a8d6abcbb4aebc942.tar.gz yosys-a6180048970802a4b8726a2a8d6abcbb4aebc942.tar.bz2 yosys-a6180048970802a4b8726a2a8d6abcbb4aebc942.zip | |
coolrunner2: Fix packed register+input buffer insertion
The register will be packed with the input buffer if and only if the
input buffer doesn't have any other loads.
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
0 files changed, 0 insertions, 0 deletions