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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 10:58:58 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 10:58:58 -0700 |
| commit | 2ae26b986cd550e4d3ce4dc5c4f7235144a6f83c (patch) | |
| tree | 5d6c6905ee40f6ec064510b42f780100095522ed /techlibs/xilinx/Makefile.inc | |
| parent | 7e304c362bc342abaed46f1906cad8b118ba45e5 (diff) | |
| download | yosys-2ae26b986cd550e4d3ce4dc5c4f7235144a6f83c.tar.gz yosys-2ae26b986cd550e4d3ce4dc5c4f7235144a6f83c.tar.bz2 yosys-2ae26b986cd550e4d3ce4dc5c4f7235144a6f83c.zip | |
Add techlibs/xilinx/cells.box
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
| -rw-r--r-- | techlibs/xilinx/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc index d68f03bb4..9937c0c9c 100644 --- a/techlibs/xilinx/Makefile.inc +++ b/techlibs/xilinx/Makefile.inc @@ -30,6 +30,7 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells.box)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh)) |