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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-04-16 15:51:03 +0200 |
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| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-04-21 19:09:00 +0200 |
| commit | 06a344efcb4a8c56f230715481ce07e715a7a4b3 (patch) | |
| tree | 7d5aa868e0843ab0309b7325b88f145493d962e9 /techlibs/intel_alm/synth_intel_alm.cc | |
| parent | 79efaa65ad73520e4354bdc33622216bf29892fc (diff) | |
| download | yosys-06a344efcb4a8c56f230715481ce07e715a7a4b3.tar.gz yosys-06a344efcb4a8c56f230715481ce07e715a7a4b3.tar.bz2 yosys-06a344efcb4a8c56f230715481ce07e715a7a4b3.zip | |
ilang, ast: Store parameter order and default value information.
Fixes #1819, #1820.
Diffstat (limited to 'techlibs/intel_alm/synth_intel_alm.cc')
0 files changed, 0 insertions, 0 deletions