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author | Eddie Hung <eddie@fpgeh.com> | 2020-05-25 15:15:20 -0700 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-07-04 19:45:10 +0200 |
commit | 3db3e1e1491b426766f1da87e1da840f3fa46278 (patch) | |
tree | 67eba12a29a5ef77dfac113e6a148d9be92a93cc /techlibs/intel_alm/common/abc9_unmap.v | |
parent | 83cde2d02ba06bbd4014858983ac324bf44cb6c6 (diff) | |
download | yosys-3db3e1e1491b426766f1da87e1da840f3fa46278.tar.gz yosys-3db3e1e1491b426766f1da87e1da840f3fa46278.tar.bz2 yosys-3db3e1e1491b426766f1da87e1da840f3fa46278.zip |
intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLY
Diffstat (limited to 'techlibs/intel_alm/common/abc9_unmap.v')
-rw-r--r-- | techlibs/intel_alm/common/abc9_unmap.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel_alm/common/abc9_unmap.v b/techlibs/intel_alm/common/abc9_unmap.v index 0eda69560..4b28866a3 100644 --- a/techlibs/intel_alm/common/abc9_unmap.v +++ b/techlibs/intel_alm/common/abc9_unmap.v @@ -1,7 +1,7 @@ // After performing sequential synthesis, map the synchronous flops back to // standard MISTRAL_FF flops. -module MISTRAL_FF_SYNCONLY( +module $__MISTRAL_FF_SYNCONLY ( input DATAIN, CLK, ENA, SCLR, SLOAD, SDATA, output reg Q ); |