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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-06 12:36:11 -0800 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-06 12:36:11 -0800 |
| commit | b70e87137d6409b7b05d5d032617ee5d7048a86d (patch) | |
| tree | a16c23e34b8d10488728201d23991a830c09d5bf /techlibs/intel/synth_intel.cc | |
| parent | 4f13ab823fcfc52c91013eb45f0c3886ed8bcc40 (diff) | |
| download | yosys-b70e87137d6409b7b05d5d032617ee5d7048a86d.tar.gz yosys-b70e87137d6409b7b05d5d032617ee5d7048a86d.tar.bz2 yosys-b70e87137d6409b7b05d5d032617ee5d7048a86d.zip | |
scc to use design->selected_modules() which avoids black/white-boxes
Diffstat (limited to 'techlibs/intel/synth_intel.cc')
0 files changed, 0 insertions, 0 deletions