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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-07-12 20:43:09 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-07-28 23:18:38 +0200 |
| commit | e9effd58d24afc8470813aec3028e932ea677aa5 (patch) | |
| tree | d8919d44c7252bab05d0994f07357a79e70f64a6 /techlibs/intel/max10 | |
| parent | 19720b970dff017c47805e37745b9fcf29843c45 (diff) | |
| download | yosys-e9effd58d24afc8470813aec3028e932ea677aa5.tar.gz yosys-e9effd58d24afc8470813aec3028e932ea677aa5.tar.bz2 yosys-e9effd58d24afc8470813aec3028e932ea677aa5.zip | |
backends/verilog: Support meminit with mask.
Diffstat (limited to 'techlibs/intel/max10')
0 files changed, 0 insertions, 0 deletions