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| author | gatecat <gatecat@ds0.me> | 2021-02-12 12:07:12 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-02-12 12:07:12 +0000 |
| commit | 9f7cd10c9887df7a8fb8e0d587955d5a03b60c52 (patch) | |
| tree | c4b1a22ebdc75ddfa94f89b82053c232896ddaab /techlibs/intel/max10/cells_arith.v | |
| parent | 13c2fd7137df6c69851452bdf3e459036e555fe4 (diff) | |
| parent | f5cc1224f9be332c055fe31d6b7db8969e060ad5 (diff) | |
| download | yosys-9f7cd10c9887df7a8fb8e0d587955d5a03b60c52.tar.gz yosys-9f7cd10c9887df7a8fb8e0d587955d5a03b60c52.tar.bz2 yosys-9f7cd10c9887df7a8fb8e0d587955d5a03b60c52.zip | |
Merge pull request #2585 from YosysHQ/dave/nexus-dotproduct
nexus: Add MULTADDSUB9X9WIDE sim model
Diffstat (limited to 'techlibs/intel/max10/cells_arith.v')
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