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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-23 17:25:46 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-23 18:24:53 +0200 |
| commit | 88e7f90663f440b24d97a65804ee23b1d82dbed7 (patch) | |
| tree | fc1d103152be86dbb4fc83b5566b17e9b1490445 /techlibs/intel/cyclonev/cells_map.v | |
| parent | e71d82759029470663037eb299791d03fef83287 (diff) | |
| download | yosys-88e7f90663f440b24d97a65804ee23b1d82dbed7.tar.gz yosys-88e7f90663f440b24d97a65804ee23b1d82dbed7.tar.bz2 yosys-88e7f90663f440b24d97a65804ee23b1d82dbed7.zip | |
Update dff2dffe, dff2dffs, zinit to new FF types.
Diffstat (limited to 'techlibs/intel/cyclonev/cells_map.v')
| -rw-r--r-- | techlibs/intel/cyclonev/cells_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel/cyclonev/cells_map.v b/techlibs/intel/cyclonev/cells_map.v index eb4cd54d1..8223df3c6 100644 --- a/techlibs/intel/cyclonev/cells_map.v +++ b/techlibs/intel/cyclonev/cells_map.v @@ -50,7 +50,7 @@ module \$_DFF_PP0_ (input D, C, R, output Q); dffeas #(.is_wysiwyg(WYSIWYG), .power_up(power_up)) _TECHMAP_REPLACE_ (.d(D), .q(Q), .clk(C), .clrn(R_i), .prn(1'b1), .ena(1'b1), .asdata(1'b0), .aload(1'b0), .sclr(1'b0), .sload(1'b0)); endmodule -module \$__DFFE_PP0 (input D, C, E, R, output Q); +module \$_DFFE_PP0P_ (input D, C, E, R, output Q); parameter WYSIWYG="TRUE"; parameter power_up=1'bx; wire E_i = ~ E; |