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| author | whitequark <whitequark@whitequark.org> | 2021-07-16 00:13:16 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-07-16 00:13:16 +0000 |
| commit | c17e385e3563e918e87a4f8bafbe290dd0911a8b (patch) | |
| tree | d344c8cc504849dd12e278726c012cc67d16f89b /techlibs/intel/cycloneive | |
| parent | a9c8ca21d583c58a38931389f90bbaae0caec0d6 (diff) | |
| parent | 54b6cb645fe7ecd492521dd05072baf9086ebdb1 (diff) | |
| download | yosys-c17e385e3563e918e87a4f8bafbe290dd0911a8b.tar.gz yosys-c17e385e3563e918e87a4f8bafbe290dd0911a8b.tar.bz2 yosys-c17e385e3563e918e87a4f8bafbe290dd0911a8b.zip | |
Merge pull request #2870 from whitequark/cxxrtl-fix-2739
cxxrtl: mark dead local wires as unused even with inlining disabled
Diffstat (limited to 'techlibs/intel/cycloneive')
0 files changed, 0 insertions, 0 deletions