aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/intel/Makefile.inc
diff options
context:
space:
mode:
authorClifford Wolf <clifford@clifford.at>2017-10-03 17:33:43 +0200
committerClifford Wolf <clifford@clifford.at>2017-10-03 17:33:43 +0200
commitb4fd7ecd839af207e8c332d8f37a59b6c0196b9d (patch)
tree866f50f10a644202612aecce5ca07e48dec35102 /techlibs/intel/Makefile.inc
parentc5b204d8d283d16e6eae8658034da6d378b6810e (diff)
parent65f91e51205fdd436c569c4795517160960ac700 (diff)
downloadyosys-b4fd7ecd839af207e8c332d8f37a59b6c0196b9d.tar.gz
yosys-b4fd7ecd839af207e8c332d8f37a59b6c0196b9d.tar.bz2
yosys-b4fd7ecd839af207e8c332d8f37a59b6c0196b9d.zip
Merge branch 'dh73-master'
Diffstat (limited to 'techlibs/intel/Makefile.inc')
-rwxr-xr-xtechlibs/intel/Makefile.inc22
1 files changed, 22 insertions, 0 deletions
diff --git a/techlibs/intel/Makefile.inc b/techlibs/intel/Makefile.inc
new file mode 100755
index 000000000..429d23677
--- /dev/null
+++ b/techlibs/intel/Makefile.inc
@@ -0,0 +1,22 @@
+
+OBJS += techlibs/intel/synth_intel.o
+
+$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/m9k_bb.v))
+$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/altpll_bb.v))
+$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams.txt))
+$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map.v))
+$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/cells_sim.v))
+$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/cells_sim.v))
+$(eval $(call add_share_file,share/intel/cyclonev,techlibs/intel/cyclonev/cells_sim.v))
+$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/cells_sim.v))
+$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/cells_sim.v))
+$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/cells_map.v))
+$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/cells_map.v))
+$(eval $(call add_share_file,share/intel/cyclonev,techlibs/intel/cyclonev/cells_map.v))
+$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/cells_map.v))
+$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/cells_map.v))
+#$(eval $(call add_share_file,share/intel/max10,techlibs/intel/max10/arith_map.v))
+#$(eval $(call add_share_file,share/intel/a10gx,techlibs/intel/a10gx/arith_map.v))
+#$(eval $(call add_share_file,share/intel/cycloneiv,techlibs/intel/cycloneiv/arith_map.v))
+#$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v))
+