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| author | David Shah <dave@ds0.me> | 2019-12-11 08:46:10 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-12-11 08:46:10 +0000 |
| commit | 613334d9dcb5c190de8396ff38e2ae73259aa7bf (patch) | |
| tree | 2cd1d71738c00c292a39718ecb241389207d8ebb /techlibs/intel/Makefile.inc | |
| parent | 7e5602ad17b20f14e56fc4c64198ca2d576917df (diff) | |
| parent | 85a14895ca31ec8c34bf5c296a5740a798b06693 (diff) | |
| download | yosys-613334d9dcb5c190de8396ff38e2ae73259aa7bf.tar.gz yosys-613334d9dcb5c190de8396ff38e2ae73259aa7bf.tar.bz2 yosys-613334d9dcb5c190de8396ff38e2ae73259aa7bf.zip | |
Merge pull request #1564 from ZirconiumX/intel_housekeeping
Intel housekeeping
Diffstat (limited to 'techlibs/intel/Makefile.inc')
| -rw-r--r-- | techlibs/intel/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel/Makefile.inc b/techlibs/intel/Makefile.inc index 4e8f423c8..d97a9b58f 100644 --- a/techlibs/intel/Makefile.inc +++ b/techlibs/intel/Makefile.inc @@ -7,7 +7,7 @@ $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_m9k. $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map_m9k.v)) # Add the cell models and mappings for the VQM backend -families := max10 a10gx cyclonev cyclone10 cycloneiv cycloneive +families := max10 arria10gx cyclonev cyclone10lp cycloneiv cycloneive $(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_sim.v))) $(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_map.v))) #$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v)) |