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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-26 14:20:06 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-26 14:20:06 -0700 |
| commit | cf9e0171273daa1bc36174aa83bd02f9cfdb5e7a (patch) | |
| tree | ca2f511409aee48bbf6d79ad082b70fed98b7306 /techlibs/ice40/tests/test_dsp_model.v | |
| parent | 1ba09c4ab79e066bcd73024bcd97f99321373b58 (diff) | |
| download | yosys-cf9e0171273daa1bc36174aa83bd02f9cfdb5e7a.tar.gz yosys-cf9e0171273daa1bc36174aa83bd02f9cfdb5e7a.tar.bz2 yosys-cf9e0171273daa1bc36174aa83bd02f9cfdb5e7a.zip | |
Add xilinx_srl_fixed, fix typos
Diffstat (limited to 'techlibs/ice40/tests/test_dsp_model.v')
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