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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-18 20:36:48 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-18 20:36:48 -0700 |
| commit | 0157043b977e3b6715a6a568eb72aea247457eb0 (patch) | |
| tree | dea7eb229e23424e4ed3226c9c4e27f565c6b233 /techlibs/ice40/ice40_unlut.cc | |
| parent | 802470746c320676d61431d420e33d34c239da84 (diff) | |
| parent | 9cb0456b6f9fa86240a747bab9780a28001b1a02 (diff) | |
| download | yosys-0157043b977e3b6715a6a568eb72aea247457eb0.tar.gz yosys-0157043b977e3b6715a6a568eb72aea247457eb0.tar.bz2 yosys-0157043b977e3b6715a6a568eb72aea247457eb0.zip | |
Merge remote-tracking branch 'origin/master' into xc7dsp
Diffstat (limited to 'techlibs/ice40/ice40_unlut.cc')
| -rw-r--r-- | techlibs/ice40/ice40_unlut.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/ice40/ice40_unlut.cc b/techlibs/ice40/ice40_unlut.cc index d16e6e6a3..f3f70ac1f 100644 --- a/techlibs/ice40/ice40_unlut.cc +++ b/techlibs/ice40/ice40_unlut.cc @@ -56,10 +56,10 @@ static void run_ice40_unlut(Module *module) cell->unsetParam("\\LUT_INIT"); cell->setPort("\\A", SigSpec({ - get_bit_or_zero(cell->getPort("\\I3")), - get_bit_or_zero(cell->getPort("\\I2")), + get_bit_or_zero(cell->getPort("\\I0")), get_bit_or_zero(cell->getPort("\\I1")), - get_bit_or_zero(cell->getPort("\\I0")) + get_bit_or_zero(cell->getPort("\\I2")), + get_bit_or_zero(cell->getPort("\\I3")) })); cell->setPort("\\Y", cell->getPort("\\O")[0]); cell->unsetPort("\\I0"); |