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| author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-07-24 10:20:46 -0700 |
|---|---|---|
| committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-07-24 10:20:46 -0700 |
| commit | c66b7402c06455535bb43ee65fe20515b5b9c0ee (patch) | |
| tree | ad135d83bf75e72b65e3136b4f6746c1f9cafab3 /techlibs/ice40/arith_map.v | |
| parent | 349c47250a9779bc58634870d2e3facfe95fbff8 (diff) | |
| parent | a66f17b6a78af8f6989235f0c72d5548b0560a58 (diff) | |
| download | yosys-c66b7402c06455535bb43ee65fe20515b5b9c0ee.tar.gz yosys-c66b7402c06455535bb43ee65fe20515b5b9c0ee.tar.bz2 yosys-c66b7402c06455535bb43ee65fe20515b5b9c0ee.zip | |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'techlibs/ice40/arith_map.v')
| -rw-r--r-- | techlibs/ice40/arith_map.v | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/techlibs/ice40/arith_map.v b/techlibs/ice40/arith_map.v index 4449fdc1b..fe83a8e38 100644 --- a/techlibs/ice40/arith_map.v +++ b/techlibs/ice40/arith_map.v @@ -44,6 +44,15 @@ module _80_ice40_alu (A, B, CI, BI, X, Y, CO); genvar i; generate for (i = 0; i < Y_WIDTH; i = i + 1) begin:slice +`ifdef _ABC + \$__ICE40_FULL_ADDER carry ( + .A(AA[i]), + .B(BB[i]), + .CI(C[i]), + .CO(CO[i]), + .O(Y[i]) + ); +`else SB_CARRY carry ( .I0(AA[i]), .I1(BB[i]), @@ -63,6 +72,7 @@ module _80_ice40_alu (A, B, CI, BI, X, Y, CO); .I3(C[i]), .O(Y[i]) ); +`endif end endgenerate assign X = AA ^ BB; |