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| author | Claire Xen <claire@clairexen.net> | 2022-02-11 16:03:12 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-11 16:03:12 +0100 |
| commit | 49545c73f7f5a5cf73d287fd371f2ff39311f621 (patch) | |
| tree | d0f20b8def36e551c6735d4fc6033aaa2633fe80 /techlibs/gowin/synth_gowin.cc | |
| parent | 90b40aa51f7d666792d4f0b1830ee75b81678a1f (diff) | |
| parent | e0165188669fcef2c5784c9916683889a2164e5d (diff) | |
| download | yosys-49545c73f7f5a5cf73d287fd371f2ff39311f621.tar.gz yosys-49545c73f7f5a5cf73d287fd371f2ff39311f621.tar.bz2 yosys-49545c73f7f5a5cf73d287fd371f2ff39311f621.zip | |
Merge branch 'master' into clk2ff-better-names
Diffstat (limited to 'techlibs/gowin/synth_gowin.cc')
| -rw-r--r-- | techlibs/gowin/synth_gowin.cc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc index 5bf0894da..cfbc9b9a6 100644 --- a/techlibs/gowin/synth_gowin.cc +++ b/techlibs/gowin/synth_gowin.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -126,8 +126,6 @@ struct SynthGowinPass : public ScriptPass json_file = args[++argidx]; nobram = true; nolutram = true; - nowidelut = true; - noalu = true; continue; } if (args[argidx] == "-run" && argidx+1 < args.size()) { @@ -240,7 +238,9 @@ struct SynthGowinPass : public ScriptPass run("opt -fast"); if (retime || help_mode) run("abc -dff -D 1", "(only if -retime)"); - run("splitnets"); + if (!noiopads || help_mode) + run("iopadmap -bits -inpad IBUF O:I -outpad OBUF I:O " + "-toutpad TBUF ~OEN:I:O -tinoutpad IOBUF ~OEN:O:I:IO", "(unless -noiopads)"); } if (check_label("map_ffs")) @@ -277,9 +277,8 @@ struct SynthGowinPass : public ScriptPass run("opt_lut_ins -tech gowin"); run("setundef -undriven -params -zero"); run("hilomap -singleton -hicell VCC V -locell GND G"); - if (!noiopads || help_mode) - run("iopadmap -bits -inpad IBUF O:I -outpad OBUF I:O " - "-toutpad TBUF OEN:I:O -tinoutpad IOBUF OEN:O:I:IO", "(unless -noiopads)"); + if (!vout_file.empty() || help_mode) // vendor output requires 1-bit wires + run("splitnets -ports", "(only if -vout used)"); run("clean"); run("autoname"); } @@ -289,12 +288,13 @@ struct SynthGowinPass : public ScriptPass run("hierarchy -check"); run("stat"); run("check -noinit"); + run("blackbox =A:whitebox"); } if (check_label("vout")) { if (!vout_file.empty() || help_mode) - run(stringf("write_verilog -decimal -attr2comment -defparam -renameprefix gen %s", + run(stringf("write_verilog -simple-lhs -decimal -attr2comment -defparam -renameprefix gen %s", help_mode ? "<file-name>" : vout_file.c_str())); if (!json_file.empty() || help_mode) run(stringf("write_json %s", |