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| author | Clifford Wolf <clifford@clifford.at> | 2019-04-30 18:08:41 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-04-30 18:08:41 +0200 |
| commit | a27eeff573c685f9a36ba4bd67e56043ab5d4716 (patch) | |
| tree | 78db7ba94131b7870a5305a1e7425ebaedde4d0a /techlibs/ecp5 | |
| parent | 5bc4de077aa95862d77dff5ce0d4b5e4a5eda9ba (diff) | |
| parent | 9d117eba9d65cf978716f1c7d41e86466ca03fc6 (diff) | |
| download | yosys-a27eeff573c685f9a36ba4bd67e56043ab5d4716.tar.gz yosys-a27eeff573c685f9a36ba4bd67e56043ab5d4716.tar.bz2 yosys-a27eeff573c685f9a36ba4bd67e56043ab5d4716.zip | |
Merge pull request #966 from YosysHQ/clifford/fix956
Drive dangling wires with init attr with their init value
Diffstat (limited to 'techlibs/ecp5')
| -rw-r--r-- | techlibs/ecp5/synth_ecp5.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ecp5/synth_ecp5.cc b/techlibs/ecp5/synth_ecp5.cc index 4b889d672..c6e12248e 100644 --- a/techlibs/ecp5/synth_ecp5.cc +++ b/techlibs/ecp5/synth_ecp5.cc @@ -253,7 +253,7 @@ struct SynthEcp5Pass : public ScriptPass if (!nodffe) run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*"); run("techmap -D NO_LUT -map +/ecp5/cells_map.v"); - run("opt_expr -mux_undef"); + run("opt_expr -undriven -mux_undef"); run("simplemap"); run("ecp5_ffinit"); } |