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| author | David Shah <davey1576@gmail.com> | 2018-07-13 16:25:52 +0200 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2018-07-13 16:25:52 +0200 |
| commit | 241429abac67de34b073db46550b1c2b4a42d425 (patch) | |
| tree | 73aa71b85a96a52a02dbf40c3b9ddad01ff7c099 /techlibs/ecp5 | |
| parent | 4a60bc83ab47b76632b38fcaec4cefffa152f507 (diff) | |
| download | yosys-241429abac67de34b073db46550b1c2b4a42d425.tar.gz yosys-241429abac67de34b073db46550b1c2b4a42d425.tar.bz2 yosys-241429abac67de34b073db46550b1c2b4a42d425.zip | |
ecp5: Add DRAM match rule
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'techlibs/ecp5')
| -rw-r--r-- | techlibs/ecp5/dram.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/techlibs/ecp5/dram.txt b/techlibs/ecp5/dram.txt index a13111f0c..b3252fa9a 100644 --- a/techlibs/ecp5/dram.txt +++ b/techlibs/ecp5/dram.txt @@ -10,3 +10,7 @@ bram $__TRELLIS_DPR16X4 clocks 0 1 clkpol 0 2 endbram + +match $__TRELLIS_DPR16X4 + make_outreg +endmatch |