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| author | David Shah <dave@ds0.me> | 2019-08-27 13:07:06 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-08-27 13:07:06 +0100 |
| commit | fc001b473187f13fa0e6f01063ffc9640fb11ef8 (patch) | |
| tree | caecb4fc51fbe7de30119d1d18679cbd58601dd6 /techlibs/ecp5/cells_bb.v | |
| parent | fdbcf789099d327bd5e9f2e0658cdad754b09db2 (diff) | |
| download | yosys-fc001b473187f13fa0e6f01063ffc9640fb11ef8.tar.gz yosys-fc001b473187f13fa0e6f01063ffc9640fb11ef8.tar.bz2 yosys-fc001b473187f13fa0e6f01063ffc9640fb11ef8.zip | |
ecp5: Add GSR support
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/ecp5/cells_bb.v')
| -rw-r--r-- | techlibs/ecp5/cells_bb.v | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/techlibs/ecp5/cells_bb.v b/techlibs/ecp5/cells_bb.v index 223e19b9e..8557053b6 100644 --- a/techlibs/ecp5/cells_bb.v +++ b/techlibs/ecp5/cells_bb.v @@ -664,3 +664,23 @@ module PCSCLKDIV ( ); parameter GSR = "DISABLED"; endmodule + +// Note: this module is not marked keep as we want it swept away in synth (sim use only) +(* blackbox *) +module PUR ( + input PUR +); + parameter RST_PULSE = 1; +endmodule + +(* blackbox, keep *) +module GSR ( + input GSR +); +endmodule + +(* blackbox, keep *) +module SGSR ( + input GSR, CLK +); +endmodule
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