diff options
| author | David Shah <dave@ds0.me> | 2019-10-01 13:46:36 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-10-01 13:46:36 +0100 |
| commit | 7a1538cd36b45fd3c397dd0414de37af768ad89e (patch) | |
| tree | 2cd1a465a436a344c65ec8201e52a4334fabb84b /techlibs/ecp5/brams_connect.py | |
| parent | d963e8c2c6207ad98d48dc528922ad58c030173f (diff) | |
| download | yosys-7a1538cd36b45fd3c397dd0414de37af768ad89e.tar.gz yosys-7a1538cd36b45fd3c397dd0414de37af768ad89e.tar.bz2 yosys-7a1538cd36b45fd3c397dd0414de37af768ad89e.zip | |
ecp5: Add support for mapping 36-bit wide PDP BRAMs
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/ecp5/brams_connect.py')
| -rwxr-xr-x | techlibs/ecp5/brams_connect.py | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/techlibs/ecp5/brams_connect.py b/techlibs/ecp5/brams_connect.py index f86dcfcf0..098607c59 100755 --- a/techlibs/ecp5/brams_connect.py +++ b/techlibs/ecp5/brams_connect.py @@ -10,6 +10,18 @@ def write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits): print(" %s," % ", ".join(dia_conn), file=f) print(" %s," % ", ".join(dob_conn), file=f) +def write_bus_ports_pdp(f, adw_bits, adr_bits, di_bits, do_bits, be_bits): + adw_conn = [".ADW%d(%s)" % (i, adw_bits[i]) for i in range(len(adw_bits))] + adr_conn = [".ADR%d(%s)" % (i, adr_bits[i]) for i in range(len(adr_bits))] + di_conn = [".DI%d(%s)" % (i, di_bits[i]) for i in range(len(di_bits))] + do_conn = [".DO%d(%s)" % (i, do_bits[i]) for i in range(len(do_bits))] + be_conn = [".BE%d(%s)" % (i, be_bits[i]) for i in range(len(be_bits))] + print(" %s," % ", ".join(adw_conn), file=f) + print(" %s," % ", ".join(adr_conn), file=f) + print(" %s," % ", ".join(di_conn), file=f) + print(" %s," % ", ".join(do_conn), file=f) + print(" %s," % ", ".join(be_conn), file=f) + with open("techlibs/ecp5/bram_conn_1.vh", "w") as f: ada_bits = ["A1ADDR[%d]" % i for i in range(14)] adb_bits = ["B1ADDR[%d]" % i for i in range(14)] @@ -44,3 +56,11 @@ with open("techlibs/ecp5/bram_conn_18.vh", "w") as f: dia_bits = ["A1DATA[%d]" % i for i in range(18)] dob_bits = ["B1DATA[%d]" % i for i in range(18)] write_bus_ports(f, ada_bits, adb_bits, dia_bits, dob_bits) + +with open("techlibs/ecp5/bram_conn_36.vh", "w") as f: + adw_bits = ["A1ADDR[%d]" % i for i in range(9)] + adr_bits = ["1'b0", "1'b0", "1'b0", "1'b0", "1'b0"] + ["B1ADDR[%d]" % i for i in range(9)] + di_bits = ["A1DATA[%d]" % i for i in range(36)] + do_bits = ["B1DATA[%d]" % (i + 18) for i in range(18)] + ["B1DATA[%d]" % i for i in range(18)] + be_bits = ["A1EN[%d]" % i for i in range(4)] + write_bus_ports_pdp(f, adw_bits, adr_bits, di_bits, do_bits, be_bits) |