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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-31 18:29:29 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-31 18:29:29 -0800 |
| commit | b2046a2114add3d24c0affd9d885b7ee320dba27 (patch) | |
| tree | 75a46fc4bbc21f18eccda3986d295590a5795a26 /techlibs/ecp5/abc9_map.v | |
| parent | 96db05aaefd970c819ba1f75b7246c5958527b8b (diff) | |
| download | yosys-b2046a2114add3d24c0affd9d885b7ee320dba27.tar.gz yosys-b2046a2114add3d24c0affd9d885b7ee320dba27.tar.bz2 yosys-b2046a2114add3d24c0affd9d885b7ee320dba27.zip | |
Cleanup ecp5 boxes
Diffstat (limited to 'techlibs/ecp5/abc9_map.v')
| -rw-r--r-- | techlibs/ecp5/abc9_map.v | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/techlibs/ecp5/abc9_map.v b/techlibs/ecp5/abc9_map.v index d8d70f9f6..113a35b91 100644 --- a/techlibs/ecp5/abc9_map.v +++ b/techlibs/ecp5/abc9_map.v @@ -1,24 +1,27 @@ // --------------------------------------- +// Attach a (combinatorial) black-box onto the output +// of this LUTRAM primitive to capture its +// asynchronous read behaviour module TRELLIS_DPR16X4 ( - input [3:0] DI, - input [3:0] WAD, - input WRE, - input WCK, - input [3:0] RAD, + (* techmap_autopurge *) input [3:0] DI, + (* techmap_autopurge *) input [3:0] WAD, + (* techmap_autopurge *) input WRE, + (* techmap_autopurge *) input WCK, + (* techmap_autopurge *) input [3:0] RAD, output [3:0] DO ); parameter WCKMUX = "WCK"; parameter WREMUX = "WRE"; parameter [63:0] INITVAL = 64'h0000000000000000; - wire [3:0] \$DO ; + wire [3:0] $DO; TRELLIS_DPR16X4 #( .WCKMUX(WCKMUX), .WREMUX(WREMUX), .INITVAL(INITVAL) ) _TECHMAP_REPLACE_ ( .DI(DI), .WAD(WAD), .WRE(WRE), .WCK(WCK), - .RAD(RAD), .DO(\$DO ) + .RAD(RAD), .DO($DO) ); - \$__ABC9_DPR16X4_COMB do (.A(\$DO ), .S(RAD), .Y(DO)); + $__ABC9_DPR16X4_COMB do (.$DO($DO), .RAD(RAD), .DO(DO)); endmodule |