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| author | David Shah <dave@ds0.me> | 2019-08-08 11:40:09 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-08-08 11:40:09 +0100 |
| commit | 83b2e0272333cfcc2529e0833723a52c066146a6 (patch) | |
| tree | 9985b7f840383419ebd5b189023ca6871a02d5a9 /techlibs/common | |
| parent | b8cd4ad64ae9a45faecffc1a6b92a8219755bc60 (diff) | |
| parent | fb568ddb4e2ccaab352d9d062f6b4926aca75680 (diff) | |
| download | yosys-83b2e0272333cfcc2529e0833723a52c066146a6.tar.gz yosys-83b2e0272333cfcc2529e0833723a52c066146a6.tar.bz2 yosys-83b2e0272333cfcc2529e0833723a52c066146a6.zip | |
Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp
Diffstat (limited to 'techlibs/common')
| -rw-r--r-- | techlibs/common/simcells.v | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v index 289673e82..64720e598 100644 --- a/techlibs/common/simcells.v +++ b/techlibs/common/simcells.v @@ -230,6 +230,25 @@ endmodule // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| //- +//- $_NMUX_ (A, B, S, Y) +//- +//- A 2-input inverting MUX gate. +//- +//- Truth table: A B S | Y +//- -------+--- +//- 0 - 0 | 1 +//- 1 - 0 | 0 +//- - 0 1 | 1 +//- - 1 1 | 0 +//- +module \$_NMUX_ (A, B, S, Y); +input A, B, S; +output Y; +assign Y = S ? !B : !A; +endmodule + +// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| +//- //- $_MUX4_ (A, B, C, D, S, T, Y) //- //- A 4-input MUX gate. |