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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-28 12:12:13 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-28 12:12:13 +0200 |
| commit | 3c45277ee0f5822181c6058f679de632f834e7d2 (patch) | |
| tree | 7bdf9f8d7a57a3744dc8d869343c710ca1055f1c /techlibs/common | |
| parent | 7bd2d1064f2eceddc3c93c121c4154a2f594a040 (diff) | |
| download | yosys-3c45277ee0f5822181c6058f679de632f834e7d2.tar.gz yosys-3c45277ee0f5822181c6058f679de632f834e7d2.tar.bz2 yosys-3c45277ee0f5822181c6058f679de632f834e7d2.zip | |
Added wire->upto flag for signals such as "wire [0:7] x;"
Diffstat (limited to 'techlibs/common')
0 files changed, 0 insertions, 0 deletions